The good old MC145572 is really an amazing chip. Our extensive work with the HDSL bitpump chips has taught me a great deal of respect and admiration for those 2B1Q transceivers. A transceiver for a system like 2B1Q is actually an amazingly complex device. There is an echo canceler, a DSP and a very non-trivial startup sequence to train those. If you are not convinced, just take a thorough look at the datasheet for the RS8973 bitpump and its controlling microprocessor code, and then judge for yourself.

But what's amazing about the MC145572 is that its TQFP-44 package is significantly smaller than the HDSL bitpump's PQFP-100, yet it integrates much more functionality, it seems. Whereas the HDSL bitpump stops at the quat level and requires an external microprocessor to facilitate the elaborate startup sequence, MC145572 integrates the ISDN framer/deframer and is completely self-sufficient. Granted, the data rate is significantly slower in ISDN than in HDSL, but I still don't see why any of the required functions for successful 2B1Q transmission would be any less necessary or any simpler. Thus if all the amazingly complex control functions required by the HDSL bitpump are also necessary for ISDN, then they must all be implemented inside that tiny chip!

The MC145572's self-sufficiency is remarkable. Whereas the RS8973 bitpump won't utter a peep on the line until the amazingly complex control software does its magic, the MC145572 doesn't need even a single register setting before it will self-activate on the line. The NT vs. LT mode is configured by a hardware pin, and if it's strapped for NT mode, it's ready to self-activate from power-up. If the chip is powered on and strapped for NT mode, it's listening for the TL tone, and as soon as it hears one, it proceeds to activation — without any action from the microprocessor.

You can literally take a CR201i board and remove the flash PROMs from the sockets, power it up like that with the CPU dead, plug the line in, and it'll activate! The line activation is completely independent of whatever the CPU is doing.

And it isn't just raw activation either — the chip's power-up defaults for all of its registers are already set to enable the fully automatic EOC processor, fully spec-compliant automatic handling of all other overhead bits, and automatic enabling of user payload data at the right time. In other words, the whole enchilada. The chip can be used quite well without having the microprocessor control interface connected at all, and the only things for which it's really needed are monitoring its status and selecting a non-default configuration on the digital TDM interface.