We are not using the ZipWire code from Mindspeed on our OSDCU in a readily recognisable form like we did on the Hack-o-Rocket; instead our SDSL bitpump control code has been significantly restructured and extended.

SDCORE is a shared library in the OSDCU software architecture. It implements ZipWire-like SDSL startup along with pre-activation, and it's layered on top of lib8973; the latter is a true library of independent routines, not a blob like the old libzw. Almost all 8051-isms have been removed and the code has been made more VAXist, making free use of 16-bit and 32-bit data types and normal memory.

The most visible functional difference between ZipWire and SDCORE is the addition of pre-activation support. Our starting code from Mindspeed was completely devoid of any such, i.e., we never got any source for AutoBaud or for anyone else's pre-activation code. Instead the pre-activation code in SDCORE has been written by us from the ground up, and was designed from the outset to support several different pre-activation schemes, something that other people's code most certainly hasn't done.

The pre-activation schemes supported by SDCORE include AutoBaud, CM's pulse train and our own pre-activation protocol that's part of IFCTF SDSL. In the STU-C role SDCORE is able to communicate the configured data rate to the STU-R via any of the listed mechanisms; in the STU-R role it listens for the configured type of pre-activation signal, generates any necessary responses, and learns the data rate in use on the line from the STU-C.

SDCORE lives primarily in the OSDCU source tree, but is also available on the Hack-o-Rocket: we started writing it before the OSDCU board was ready.