Architecture

The Hack-o-Rocket software architecture has been designed around the modest hardware resources: 64 KB of RAM and 256 KB of flash total. The 16 bit wide flash bank made of two 29F010s can be further subdivided into 8 erase blocks of 32 KB each.

The software architecture we've adopted consists of an invariant monitor which resides at the beginning of the flash bank and completely fits in the first erase block, and a set of application-like programs which can be loaded via the monitor either into RAM or into the remaining erase blocks of the flash.

Hack-o-Rocket Monitor

The monitor is the same for both SDSL and IDSL. It doesn't touch any of the DSL stuff, instead it's a basic MON302-based processor monitor and provides the following functions:

Utility programs

The following utility programs have been written so far:

IDEBUG

This is the debug utility for the IDSL version. It talks to the MC145572 ISDN transceiver, and although there is no external control of the autonomous activation process, IDEBUG monitors and reports its progress and state. Commands are provided to read and write all MC145572 registers, and some of the basic memory peek and poke functionality of the monitor is replicated as well.

IDEBUG can also configure the time slot assigner for any requested configuration and bring up SCC1 on the LC302 to experiment with the resulting IDSL bit stream. SCC1 can be configured for the HDLC mode, in which case IDEBUG installs a frame receive interrupt handler and prints all received frames as they arrive, or for transparent bit stream capture, which is a one-shot operation. IDEBUG doesn't transmit anything, but in the HDLC mode the SCC transmitter is configured and enabled with no BDs in the ready state, so the user can transmit a test packet by constructing one somewhere in RAM and then simply writing into the first TxBD.

IDEBUG is built in both run-from-RAM and run-from-flash versions. The former needs to be loaded from a TFTP server via the monitor every time you want to run it, the latter is loaded into the last erase block of the flash once via the flash writer utility.

SDEBUG

This is the SDSL counterpart to IDEBUG. It is substantially more complex as it includes libzw, the ZipWire bitpump control library.

SDEBUG's primary purpose is to exercise libzw, and console commands are provided which correspond directly to _BtControl() and _BtStatus() API calls. _BtMain() is called repeatedly while waiting for console command input.

Like IDEBUG, SDEBUG is built in both run-from-RAM and run-from-flash versions. However, since it is much larger, the RAM version uses up all available RAM for its code and stack and leaves no room for buffers. The run-from-flash version must thus be used for SCC experiments.

Flash writer

This is a utility which the user loads into RAM from a TFTP server and runs via the monitor, and which then completely takes over the system so that the flash can be written to safely. The actual flash erase and program operations are provided, as well as downloading from the TFTP server directly into the flash. This utility is common to both SDSL and IDSL like the monitor.

The Hack-o-Rocket IP router application is described on its own page.

So where do I get your Hack-o-Rocket software?

The latest Hack-o-Rocket software release can be found here on our FTP site. Contained therein are a user package with MC68LC302 target binaries which can be loaded on an actual CR201 board and documentation for those wishing to do so, and a source package which can be used with a GCC & GNU Binutils development environment for those wishing to adore or modify the code.